A 6Gbps 3mW optical receiver with DCOC-combined ATC in 65nm CMOS

This paper presents a 0.48-mW/Gbps optical receiver in a 65-nm CMOS process. The receiver includes a tran-simpedance amplifier (TIA) with a DC offset canceler (DCOC) combined with an autothreshold controller (ATC) function for providing low-power, area-efficient single-ended-to-differential conversion. The fabricated 6-Gbps optical receiver consumes 2.86-mW power and achieves less than -3.8-dBm sensitivity at a BER of 10
^-11
.