Design of a VLSI mixed analogue and digital modular ASIC processor for capacitance tomography

The increasing complexity of instrumentation in science and industry has lead to a growth in the use of Application Specific Integrated Circuits (ASICs). Solutions using ASICs are very cost efficient in high volume production. They are also very valuable when instrument volume, functionality, and reliability are the main issues. In the standard cell approach, the ASIC designer is allowed to use predefined functional building blocks as an aid in the design process. This is advantageous when using a high-level design methodology for the digital circuits. Preverified models exist for the analogue and the digital standard cells, and thus the standard cell approach is very similar to using Field Programmable Gate Arrays (FPGAs). However, using standard cells, as opposed to full custom design techniques, leads to degraded flexibility and performance in terms of circuit density and speed. On the other hand one gains design time.