Expanded application space for laser spike annealing of CMOS devices

LSA was first introduced into mainstream semiconductor manufacturing for logic IC's at the 65 nm node, continuing the natural evolution of semiconductor thermal processing to higher temperatures (>1200°C) and shorter times (100's of microseconds). The initial application was a simple one-step LSA to assist spike-RTA in dopant activation of the source/drain and polysilicon gate regions. Since then, LSA has proliferated to other junction engineering steps in the high temperature/low dwell time regime. As devices scale to sub-45 nm nodes, there are opportunities for LSA to expand to alternative applications in other regions of temperature-time (T-t) process space. This paper will discuss the application of LSA to logic IC manufacturing within the framework of T-t process space, which is divided into three regimes: 1. High temperature, 2. Long dwell time, and 3. Low temperature. We describe how the design of the LSA system enables access to these three T-t regimes, and discuss current and future applications for each regime.