The acquisition performance of delay-lock loops in noise

Describes results of a computer simulation of a re-configurable delay-lock loop (DLL) which allows fast acquisition of code synchronisation in very poor input SNR conditions. The DLL is based on an analogue prototype but is implemented digitally and this allows the loop to be switched very easily from a noncoherent configuration during initial acquisition to a coherent loop after code, carrier and data bit synchronisation have been achieved. Consequently, the jitter performance of the loop is significantly improved during the normal tracking phase. The loop can also be switched from a conventional 1/spl Delta/ or 2/spl Delta/ configuration to a much wider loop, such as a 4/spl Delta/ loop to give improved tracking performance under conditions of very high code-rate Doppler frequency shifts found in low earth orbit satellite systems.