A VLSI Architecture and the FPGA Prototype for MPEG-2 Audio/Video Decoding

This paper details our experience of developing an MPEG-2 audio/video decoder which operates at main level/main profile, 720 × 480 4:2:0 at 29.97 frames per second, with audio at 16 bits, 48 000 samples per second. The design has been developed with a focus on energy-efficiency.