A modified charging algorithm for comparator-based switched-capacitor circuits

This paper presents a modified charging algorithm for fully-differential comparator-based switched-capacitor (CBSC) circuits by utilizing an additional comparator to compare a variable differential threshold rather than detecting the zero crossing during coarse (E
₁
) transfer phase. The large overshoot in the coarse phase can be eliminated such that it relaxes the stringent trade-off between speed and accuracy, which exists in the conventional CBSC circuits. A 1.2-V Sample-and-Hold circuit implemented in 90 nm CMOS process is used to demonstrate the effectiveness of this concept.