Transient enhanced threshold shifts in power MOS transistors

This paper reports for the first time a measured reduction in the threshold voltage of closed-cell power MOS transistors when compared to conventional devices fabricated in the same technology. This effect can have a significant impact on scaling power MOSFETs. We show that transient enhanced diffusion (TED) results in a reduced pileup of boron at the device corners, compared to its edges, due to three-dimensional effects. These effects modulate the gate edge pileup, which has previously been linked to the reverse short channel effect, and can lead to the observed threshold voltage reduction phenomenon. Three-dimensional process and device simulation results are presented to corroborate the experimental data.