Cross-talk prevention for power integrated circuits

Power Integrated Circuit (PIC), which combines one or more power devices with CMOS logic and control circuit on the same chip, offer simplified design, reduced system costs, and increased reliability. One of the main challenges of this technology is cross-talk prevention between the power device and CMOS circuit or between one power device to another power device. This paper presents an innovative isolation structure which can be used to prevent cross-talk in PICs. Two dimensional device simulation using MEDICI was carried out to characterize the performance of this structure with different configurations and dimensions. Results show that the structure is effective in preventing latch-up and cross-talk in CMOS structures caused by minority current flow in the substrate.