A New Loss Compensation Technique for CMOS Distributed Amplifiers

This brief presents a circuit technique to compensate for the metal and substrate loss of the on-chip transmission lines (TLs), and, consequently, to improve the gain flatness and bandwidth of CMOS distributed amplifiers (DAs). An eight-stage DA suitable for 40-Gb/s optical communication is devised and implemented in a 0.13-mum CMOS process. The DA achieves a flat gain of 10 dB from dc to 44 GHz with an input and output matching better than -8 dB. The measured noise figure varies from 2.5 to 7.5 dB with the amplifier's band. The proposed DA dissipates 103 mW from two 1-V and 1.2-V dc supplies.