Work-Function Engineering for 32-nm-Node pMOS Devices: High-Performance TaCNO-Gated Films

We have demonstrated p-type field effect transistors (p-FETs) devices using a TaCNO metal gate for the first time. These p-FETs have threshold voltage values of - 0.4 and - 0.25 V for HfSiON and HfSiO gate dielectrics, respectively, with equivalent oxide thickness of 1.6-1.7 nm. The TaCNO metal shows a high effective work function (eWF) of 4.89 eV on thick SiO
₂
interface layer, although the eWF rolls off with reducing EOT. Excellent transistor characteristics are achieved, with I
_on
of 375 muA/mum at I
_off
= 60 nA, for V
_dd
= 1.1V .