A recursive multifunction circuit for leading-digit detection and comparison

It is known that fast, fully combinational leading-digit detector circuits can be generated efficiently by recognizing their inherent hierarchical structure. It is shown herein that this structure is not only hierarchical, but also recursive. This recursivity fully defines a minimal-complexity circuit, thus guaranteeing optimal circuit synthesis. Such a circuit having an N-bit operand generates all output bits with log
₂
(N) combinational stages. It also makes possible a recursive parameterizable description in VHDL or other hardware description languages supporting recursion. For standard cell generation, it is amenable to efficient, automatic recursive routing. Furthermore, the same recursive structure can serve as the basis of other useful arithmetic functions, such as a fast comparator (log
₂
(N) stages). Therefore, such a multifunction circuit could be employed in the design of fast, low-complexity arithmetic-logic units (ALUs) inside microprocessors, digital signal processors, or application-specific system-on-chip (SoC) designs.