Silicon-On-Nothing (SON) applications for Low Power technologies

The power consumption and the matching will be the principal issues at the 32 nm node and below. In this context, Ultra-Thin Body devices are extensively studied for the end-of-roadmap CMOS. In this paper we present the SON technology, leading to the simple fabrication of sustained mono-Si nano-membranes over an empty tunnel, and discuss on the application of this process to build-up electronic devices. This technology opens a wide range of applications, in particular for the realization of localized single-gate fully depleted transistors on bulk substrates and of double-gate planar devices, co-integrable with conventional bulk devices.