Radiation dependence of inverter propagation delay from timing sampler measurements

A timing sampler consisting of 14 four-stage inverter-pair chains with different load capacitances was fabricated in 1.6- mu m n-well CMOS and irradiated with cobalt-60 at 10 rad(Si)/s. For this CMOS process the measured results indicate that the rising delay increases by about 2.2 ns/Mrad(Si) and the falling delay increase is very small, i.e., less than 300 ps/Mrad(Si). The amount of radiation-induced delay depends on the size of the load capacitance. The maximum value observed for this effect was 5.65 ns/pF-Mrad(Si). Using a sensitivity analysis, the sensitivity of the rising delay to radiation can be explained by a simple timing model and the radiation sensitivity of DC MOSFET parameters. This same approach could not explain the insensitivity of the falling delay to radiation. This may be due to a failure of the timing model and/or trapping effects.<
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