Sidewall gate controlled diode for the measurement of silicon selective epitaxial growth-SiO/sub 2/ interface defects

The sidewall gate controlled diode (SGCD) device structure for the measurement and evaluation of electrical defects near the vertical silicon-SiO/sub 2/ sidewall interface associated with low-temperature low-pressure silicon selective epitaxial growth technologies is discussed. Initial results give evidence that the SGCD operates as intended and is useful for quantifying the sidewall interface defects. The initial analysis of the sidewall interface indicates that the defects present are bulk defects near the interface and not dangling bonds or other defects at the interface. The next step toward understanding the nature of the sidewall defects is to investigate the dependence of the sidewall surface recombination velocity and near sidewall lifetime on various process variables.<
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