An Efficient Design of H.264 Inter Interpolator

In this paper, a highly efficient inter interpolation architecture for the H.264/AVC standard is proposed. Since the placement order of frame pixels in the memory is either row-wise or column-wise which may not be suitable for the sample prediction in particular direction, this paper proposes a novel interpolator design which can dynamically configure the datapath for different predicted modes to perform proper computation schedules suitable for the nature input order of reference samples. The proposed design methodology not only can avoid the additional data transposition buffer, but most importantly the communication time spent to move the reference data can be overlapped with the data computation time. Furthermore, by decomposing the chroma interpolation into a series of shift and addition operations, both luma and chroma interpolations can be realized in the same module. Our experimental result shows that our architecture can achieve more than 40% reduction in both processing time and hardware cost. The proposed interpolator can be applied to the dedicated H.264 hardware codec design for various consumer devices.