A semicustom implemented connection matrix for SDH systems

The introduction of the synchronous digital hierarchy (SDH) in digital communications has emphasized the importance of implementing complex and compact matrix devices, inside the network nodes. The authors introduce the ASIC Matisse, which performs a complete, rearrangeable connection matrix among 16 input Synchronous Transport Module-1 (STM1) frames (up to 1008 Virtual Container-12 (VC12) synchronous 2.048-Mb/s tributaries), and eight output STM1 frames (up to 504 VC12s), in a 235 K-usable-gate, sea-of-gates chip. Two features are pointed out: modular architecture partitioning in N /spl times/ 4 submatrices, making routing feasible; and coprocessing capability, making real-time programming feasible.<
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