A low-power CMOS time-to-digital converter

A time-to-digital converter, TDC, with 780 ps lsb and 10-/spl mu/s input range has been integrated in a 1.2-/spl mu/m CMOS technology. The circuit is based on the interpolation time interval measurement principle and contains an amplitude regulated crystal oscillator, a counter, two pulse-shrinking delay lines, and a delay-locked loop for stabilization of the delay. The TDC is designed for a portable, low-power laser range-finding device. The supply voltage is 5/spl plusmn/0.5 V, and the operating temperature range is -40 to +60/spl deg/C. Single-shot accuracy is 3 ns and accuracy after averaging is /spl plusmn/120 ps with input time intervals 5-500 ns. In the total input range of 10 /spl mu/s, the final accuracy after averaging is /spl plusmn/200 ps. Current consumption is 3 mA, and the chip size is 2.9 mm/spl times/2.5 mm.<
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