Modeling of an ADC based on high-T/sub c/ QOJS comparators

Existing proposals for high temperature superconductor analog to digital converter (ADC) circuits suffer performance penalties because of the difficulty of fabricating devices with small and controlled inductances. The design of a quasi-one junction SQUID (QOJS) comparator for a high-T/sub c/ flash ADC is proposed and discussed. The inductances are calculated with the help of a three-dimensional field calculation program, and simulations on the QOJS-comparator are performed using a SPICE-type simulation program.<
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