A self-aligned retrograde twin-well structure with buried p/sup +/-layer

The retrograde twin wells and buried p/sup +/ layer are fabricated by a single lithographic step using high-energy ion implantation. The retrograde n-well is self-aligned to the retrograde p-well regions. This simple process allows a scalable CMOS structure for the very tight n/sup +/-to-p/sup +/ spacing. It provides latch-up immunity at the 1.5- mu m n/sup +/-to-p/sup +/ spacing and good isolation characteristics without additional n- and p-channel stops.<
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