A 470-MHz CMOS true single-phase clocked bit-serial arithmetic unit

A two's complement bit-serial arithmetic unit (AU) that operates at very high clock rates is presented in this paper. It is designed for a bit-serial SIMD data-path architecture and can perform several different arithmetic operations; for example sum-of-two-products. In order to attain a very high clock rate, the AU circuitry employs the true single-phase clocking (TSPC) technique, which encourages a high degree of pipelining. A 5-bit AU chip on an active area of 0.073 mm/sup 2/ has been fabricated in a 1.0-/spl mu/m standard CMOS process. Tests have verified correct chip operation up to a clock rate of 470 MHz at V/sub dd/=5 V. At this frequency the AU power consumption is 11.5 mW.<
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