An automatic offset compensation scheme with ping-pong control for CMOS operational amplifiers

An automatic offset compensation scheme for CMOS operational amplifiers is presented. Offset is reduced by digitally adjusting the bias voltage of a programmable current mirror which is used as the load of the differential input stage. A 100% operating duty cycle is obtained by using a ping-pong structure. The offset compensation scheme is inherently time and temperature stable since the offset compensation is periodically performed with the ping-pong control. The proposed circuit has been fabricated using a 1.0 /spl mu/m n-well CMOS process. The measured offset voltages of the test circuits are less than 400 /spl mu/V in magnitude.<
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