VLSI implementation of a pel-by-pel motion estimator

The design of an integrated circuit chip set implementing a motion estimator (ME) for video coding is described. Such a circuit can be used to reduce the redundancy of a full-motion video source for applications where low- or very-low-bit-rate coding is required. The chip architecture is motivated by the consideration that the ME equations can be solved with a recursive approach, pel by pel, with a simple serial design. The system structure is partitioned into three stages: the first stage implements the pseudogradient generator, the second is the recursive displacement generator, and the third is a shared memory array. The ME design was achieved by means of commercial tools, in particular a macrocell generator and a parameterized high-level behavioural description. The circuit layout was synthesized by using custom cells, whereas glue logic was made with a standard cells approach.<
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