Memorist: a diffused CMOS SRAM compiler for gate array applications

A flexible SRAM compiler has been developed to generate high speed, high density, synchronous CMOS memories. The fully diffused single and dual port designs allow for a high level of memory integration into a gate array environment targeted for system solutions. The compiler provides for accurate multi-level timing characterization and is tightly integrated into an ASIC development system. A 4-die test-chip cluster has been developed.<
>