Vector Hartley transform employing multiprocessors

Many parallel implementations for signal processing transforms have already been reported. The implementation of Hou's FHT algorithm (1987) has been studied on three multiprocessor architectures (MPAs): multiprocessors connected through a shared bus; multiprocessors connected by an indirect binary n-cube multistage interconnection network and mesh connected multiprocessors. The article analyzes the performance of a vector Hartley transform algorithm on these MPAs.<
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