Specification driven synthesis of CMOS op-amps

Describes a suite of programs that calculate the sizes of the transistors in CMOS operational amplifiers for a given performance specification. The aim is to reduce the role of simulation to that of a simple check to characterize the amplifier. To make this possible the authors have developed ways to introduce parasitic components into the synthesis. The sizing programs make an initial estimate of sizes and then use the parasitics associated with the transistors to make a more accurate calculation of the sizes. In this paper the authors describe the technique for the Unity Gain Bandwidth (UGB) and Phase Margin. The average error in these parameters is 4% over a range of frequencies from 1 MHz to 10 MHz.<>