FIR switched-capacitor decimators with active-delayed block polyphase structures

Finite impulse-response (FIR) switched capacitor (SC) decimator circuits using previously proposed structures are not practical for applications requiring long impulse responses on account of a rather large (unrealistic) number of SC branches and switching waveforms. For such applications, polyphase structures are proposed that lead to FIR SC decimator circuits that use significantly fewer branches and switching waveforms, and are thus more attractive for integrated circuit implementation. The design of an FIR SC low-pass decimator with an amplitude response tailored for video interface applications is given as an example.<
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