Substrate deep depletion: an innovative design concept to improve the voltage rating of SOI power devices

This paper, for the first time, proposes and experimentally demonstrates an innovative design concept for SOI power devices that exploits substrate deep depletion to considerably improve device voltage rating. This dynamic effect allows the design of a whole new generation of SOI power devices providing dramatically improved performances. Eligible applications are power conditioning circuits (flyback, resonant) in which the device sustains transient voltages higher than bus voltage. Numerical simulations explain the physics of the device. Experimental measurements on SOI power LDMOS using P
^-
substrate clearly demonstrate that the newly proposed "deep depletion SOI device" presents 170V static breakdown voltage while sustains transient overvoltages up to 290V