A new and effective method in failure analysis of gate oxide polysilicon capacitor structure

In wafer fabrication, gate oxide integrity (GOI) plays an important role in the reliability and yield of integrated circuits. Failure in gate oxide polysilicon capacitor during reliability test and product manufacturing testing is a concern and needs failure analysis to determine the root cause of the failure. The most common method to perform fault isolation is using emission microscope to detect the emission spot. The challenging area to identify the defect in gate oxide polysilicon capacitor is the difficulty in removing bulk polysilicon of the structure. Although polysilicon etchant and acetone tape are used extensively, it always does not guarantee to successfully remove the polysilicon and most of time the success rate is low time consuming as it requires long time to delayer the structure. Thus in this paper a method was developed and bulk polysilicon can be etched in few seconds and the whole process of deprocessing can be completed in few minutes, greatly enhance the efficiency of performing failure analysis and resolves the difficulty encountered in Chartered. This method consists of dipping sample in SCI solution (1NH/sub 4/OH:1H/sub 2/O/sub 2/:5H/sub 2/O) follows by polysilicon etch (20HNO/sub 3/:8CH/sub 3/COOH:1HF).