Impact of high DC bias on RF LDMOS reliability for radar application

The reliability of power RF LDMOS submitted to RF and DC accelerated tests under high temperature has been investigated by DC and dynamic electrical characterization. After DC and RF ageing, some electrical parameters changed, with a significant drift of the feedback capacitance (C
RS
). In order to explain qualitatively electrical parameter shifts, a 2D RF LDMOS structure was implemented and simulated with ATLAS-SILVACO. Simulation results tend to show that, for a given bias conditions, all conditions are set for hot carrier degradation.