Automatic gain control circuit for power line communication application

A CMOS automatic gain control (AGC) circuit for power line networking application is presented. In this work, the AGC can effectively lock the amplitude of the input signal within 0.2μs. Implemented in 0.35μm CMOS process, the dynamic range of the variable gain amplifier is more than 36dB and the bandwidth of its forward path is 85MHz. It is designed for power line communication application and is fed from a single 3.3-V power supply. Its power consumption is 4.2mW and area of the AGC is 630 × 700 μm
²
.