A power dissipation comparison of ALU-architectures for ASIPs

This paper focuses on the implementation of different ALU architectures for ASIPs with greater emphasis on the reduction of power dissipation. The examinations are based on a workframe for the design of fully configurable ASIP with proper selection of power efficient ALU architectures for the implementation of digital filters. Architectures with high ALU complexity and low ALU access rate are compared against architectures with low ALU complexity and high ALU access rate to find out the one that provides a better power efficiency. More in detail, we discuss the reduction of the power dissipation by choosing optimized ALU architectures for the implementation of digital filters.