A CMOS integrated capacitive fingerprint sensor with 32b microcontroller

The ASIC implementation of a capacitive fingerprint sensor SoC has an embedded 32 b RISC microcontroller. The SoC also comprises a 160/spl times/192 array of cells with a sensor-detecting circuit. The test chip is fabricated in a 0.35 /spl mu/m 4M1P CMOS process with a die size of 12 mm/spl times/12.7 mm.