Process and performance comparison of an 8K × 8-bit SRAM in three stacked CMOS technologies

Using self-aligned and non-self-aligned stacked CMOS technologies experimental 8K × 8-bit static random-access memories (SRAM'S) have been fabricated. Hydrogen passivation has been used to improve the performance of polysilicon devices. An 8K × 8-bit SRAM using non-self-aligned memory cells and employing a CW argon laser to anneal the second (active) polysilicon layer has also been fabricated. The fabrication methods and performances of all three SRAM's have been compared.