A fast evaluation of power delivery system input impedance of printed circuit boards with decoupling capacitors

A fast power delivery system input impedance evaluation methodology for printed circuit board decoupling capacitor placement study is presented in This work. The methodology is based on electrical network admittance matrix properties. The admittance matrix methodology described in This work is rigorously validated by comparing the decoupling capacitor placement evaluation of a real printed circuit board by both impedance matrix and results from commercial electromagnetic field software.