A 2.5-V, 14-bit MASH sigma-delta modulator for ADSL

This work presents a fourth order, multi-stage noise shaped (MASH) sigma-delta modulator (SDM) for wide bandwidth applications. Each stage of the SDM consists of a second order SDM with multi-level quantizer. The first stage is a low distortion second order single loop SDM, while the second stage of the SDM is a low distortion SDM with Chebyshev type II filter technique. The proposed architecture can reduce the signal distortion of circuits to improve the performance. A test SDM chip for ADSL application is designed and implemented by TSMC 0.25/spl mu/m process. The simulation results indicate that the dynamic range (DR) could reach 87dB with power dissipation of 65mW.