Characteristics of high-K spacer offset-gated polysilicon TFTs

In this paper, a self-aligned offset-gated poly-Si TFT using high-K dielectric (Hafnium oxide, HfO/sub 2/) spacers for channel scaled-down system-on-panel applications is experimentally demonstrated for the first time. The HfO/sub 2/ film is deposited by magnetron sputter deposition, and the HfO/sub 2/ spacers are formed by reactive ion etching. Numerical simulations show that with the high vertical field induced underneath the high-K spacer, an inversion layer is formed, and it effectively increases the on-state current while still maintaining a low leakage current in the off-state, comparing to the conventional lightly doped drain or oxide spacer TFTs. The experimental on-state current in the HfO/sub 2/ spacer offset-gated poly-Si TFT is approximately two times higher than that of the conventional oxide spacer TFT with the same leakage current.