Adjusting poly texture to reduce TiSi/sub 2/ agglomeration [semiconductor manufacturing]

With its low resistivity and relatively high thermal stability, TiSi/sub 2/ is a promising gate material for use in semiconductor manufacturing. It can survive the oxidization and backend thermal steps without a spacer; however, it sometimes agglomerates into the gate poly. This paper outlines a possible solution that entails replacing the normal amorphous gate poly with a different type of as-deposited poly to reduce the gate short caused by agglomeration. Scanning electron microscopy (SEM) inspections of cross sections of blank test wafers reveal the potential of this method.