CMOS folding and interpolating A/D Converter with differential compensative T/H circuit

A 450 MS/s, 6-bit CMOS folding and current-mode interpolating A/D Converter is designed in a 0.5 /spl mu/m standard digital CMOS process. A differential T/H circuit with the offset compensative amplifiers is proposed which can improve sample precision. The converter's power dissipation is simulated as 190 mW from a 5 V supply. The latency between input and output is 2.5 clock cycles.