A new multi-port memorizer with global share and feebleness conflict access

The controlled objects require the control system to deal with the high real-time and huge tasks mightily. The multi-processor and multi-computer system is the effective approach. But the communication spending among processors and computers is the bottleneck of effecting performance. Based on the analysis of the multi-processor and multi-computer system. The paper presents a new multi-port memorizer with global share and feebleness conflict access. And its structure and work principle are discussed and its performance is analyzed. The Theory and results of experiment show the memorizer can improve the communication ability among processors and computers greatly.