Failure research on an optoelectronic fail-safe logical circuit

The optoelectronic logical circuits are ones of the most various circuits that are used in the railway signaling systems. They are referring to circuits with external pulse cycle. In recent years there have been several publications on such circuits. In this paper is proposed the technique for research of theirs functional behavior with given criteria for fail-safe output reaction. PSpice analyses for the circuit behavior are developed with OrCad tools when input parameters are given. Different faults are simulated and the fail-safe behavior is analyzed. Different graphical results are worked out. The problem of circuit speed is investigated. Safety estimation of the scheme is done in conclusion.