Estimation of power dissipation in switched-capacitor circuits

This paper presents an algorithm for probabilistic analysis of the power dissipation in switched-capacitor circuits, which are frequently found in a number of low-power designs, such as those for mobile communications equipment. The inputs to the circuit are modeled as a stationary Markov process of order zero or one. The expected power dissipation is obtained from first- and second-order moments of (he probability distributions of voltages and charges in the circuit. The algorithm does not require Monte Carlo analysis; instead, (he moments of the probability distributions are computed from the solutions of systems of linear algebraic equations, taking into account any correlation among the inputs. To demonstrate the algorithm's performance, numerical results obtained on a number of sample switched-capacitor circuits are reported.