Non-linear cellular automata based PRPG design (without prohibited pattern set) in linear time complexity

This paper reports an efficient BIST solution for VLSI circuits. The solution is based on an onchip Pseudo-Random Pattern Generator (PRPG). The test solution guarantees non-issuence of the test patterns declared prohibited to a CUT (Circuit Under Test). It has been developed around non-linear Cellular Automata (CA) and provides a linear time solution of designing an n-bit PRPG. Experimental results confirm the enhanced pseudo-random quality of the test patterns due to application of non-linear CA rules.