STAT: a schematic to artwork translator for custom analog cells

STAT (schematic to artwork translator) is a program to generate full-custom layouts of analog cells from arbitrary schematic topologies in any IC technology. The circuit designer first annotates the schematic with component matching and symmetric relationships. Software subroutines are used to generate and/or identify device artwork. Related component groups are placed first, so annotated layout constraints are preserved. A novel placement method which recognizes that analog schematic topologies often reflect desirable layout configurations is proposed. A flexible cell-level router has been developed to complete the layout.<
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