A 20 MHz QAM chip with numerical controlled carrier generator for research in HDTV

The implementation of a digital quadrature amplitude modulator/synchronous demodulator with numerical controlled carrier generator for research on high-definition television applications is described. The chip will handle clock rates up to 20 MHz and provide carrier frequencies from 3.0 Hz to 10 MHz in 3 Hz increments using a numerical controlled oscillator (carrier generator). In addition, a +/-360 degree phase shift capability in 0.03 degree increments is also provided. The methodology used to construct this system is a standard cell library using a 1.5 mu m CMOS process. Further enhancements on the chip are two compiled ROMs, two 8*8 Booth multipliers, and two FIR notch filters.<
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