A low-voltage low-power analog memory cell with built-in 4-quadrant multiplication

An accurate switched-current (SI) memory cell and suitable for low-voltage low-power (LVLP) applications is proposed. Information is memorized as the gate-voltage of the input transistor in a tunable gain-boosting triode-transconductor. Additionally, four-quadrant multiplication between the input voltage to the transconductor regulation-amplifier (X-operand) and the stored voltage (Y-operand) is provided. A simplified 2/spl times/2-memory array was prototyped according to a standard 0.8 /spl mu/m n-well CMOS process and 1.8-V supply. Measured current-reproduction error is less than 0.26% for 0.25 /spl mu/A /spl les/ I/sub SAMPLE/ /spl les/ 0.75 /spl mu/A. Standby consumption is 6.75 /spl mu/W per cell at I/sub SAMPLE/=0.75 /spl mu/A. At room temperature, leakage-rate is 1.56 nA/ms. Four-quadrant multiplier (4QM) full-scale operands are 2x/sub max/=320 mV/sub pp/ and 2y/sub max/=448 mV/sub pp/, yielding a maximum output swing of 0.9 /spl mu/A/sub pp/. 4QM worst-case nonlinearity is 7.9%.