A 34ns 1Mb CMOS SRAM using triple poly

THIS REPORT will describe a 128KW x 8b CMOS SRAM with an access time of 34ns and a standby current of 2μA. The RAM was fabricated using triple polysilicon and single aluminum CMOS technology with 0.8μm minimum features. A high resistive third polysilicon load has been developed to realize a low stanby du443n5. To obtain a faster access time, a architecture of 16 block and a Data-Output presetting technique combined with ATD are used.