A 16-level/cell dynamic memory

A multilevel storage dynamic memory using a standard DRAM memory cell array is presented. A staircase word pulse and a charge-transfer preamplifier are used for converting binary data to multilevel storage voltages and vice versa. The 16-level (4-bit)/cell READ/WRITE operation has been confirmed at storage levels as low as 80-100 mV. The storage-level voltage accuracy is limited basically by subthreshold leakage current.