Computer analysis and modeling of injection-coupled synchronous logic (ICSL) gates

Discusses the computer analysis and modeling of injection-coupled synchronous logic (ICSL) gates. A lumped circuit model is developed taking into account the layout and dimensions of the gate. The model is suitable for analysis using a standard computer program such as SPICE. Equations for the static and dynamic model parameters including partial base currents, collector currents, current gains, transit times, and depletion capacitances are developed in terms of physical dimensions and process parameters. The performance of the model is successfully tested against experimental results over a wide range of injection currents.