Rapid thermal processing of high dielectric constant gate dielectrics for sub 70 nm silicon CMOS technology

The use of high-/spl kappa/ gate dielectrics in place of the currently used Si-based gate dielectrics has the potential to push Si complementary metal-oxide-silicon (CMOS) technology to the fundamental limit of about 10 nm feature size circuits. Rapid thermal atomic layer chemical vapor deposition (RTALCVD) is used to deposit ZrO/sub 2/ on Si substrates to fabricate MIS structures. The leakage current and capacitance measurements were done to analyze their electrical properties. Achieving low leakage current density along with high capacitance per unit area demonstrates the superior performance of our process.