A low-voltage design approach for class AB current-mode circuits

An approach for designing analog current-mode circuits with very-low supply voltage requirements is described and applied to the implementation of basic complementary metal-oxide-semiconductor (CMOS) building blocks. The method is based on a biasing circuit exploiting poly resistors and auxiliary differential amplifiers which restricts supply requirements to one threshold voltage plus three saturation voltages. As design examples, a complementary current mirror, a current operational amplifier, and a transconductor are implemented adopting the proposed technique. SPICE simulations using a 0.5-/spl mu/m process are provided which closely confirm the expected overall good performance of these circuits especially in terms of low-voltage capability and speed.